Phase control circuit

A phase control circuit includes: a variable delay circuit (6) for delaying a clock signal (101); a first flip-flop circuit (2) having a clock input terminal to which the delayed clock signal (101a) is input and a data input terminal to which a data signal (100) is input; a second flip-flop circuit...

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Bibliographische Detailangaben
Hauptverfasser:	TANIMURA, DAISUKE, YAKIHARA, TSUYOSHI, KODAKA, HIROTOSHI, TEZUKA, KENTARO, BUTATSU, KENTARO, UCHIDA, KENJI, MIURA, AKIRA
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:	A phase control circuit includes: a variable delay circuit (6) for delaying a clock signal (101); a first flip-flop circuit (2) having a clock input terminal to which the delayed clock signal (101a) is input and a data input terminal to which a data signal (100) is input; a second flip-flop circuit (7) having a clock input terminal to which the data signal (100) is input and a data input terminal to which the delayed clock signal (101a) is input; and an integration circuit (50) for controlling a delay amount of the variable delay circuit based on an output signal of the second flip-flop circuit (7).