Realisation of two superposed elements inside an integrated electronic circuit

A radiation attenuating layer (2) is formed above lower circuit element that is reflective to radiation. A layer transparent to radiation is formed above attenuating layer. A lithography resist mask deposited on circuit is exposed to primary radiation flux. The mask is developed to remove portions exposed to amount of radiation above mask development threshold. An upper circuit element that has one side defined by edge of attenuating layer and other side superimposed with a side of lower element is formed. An independent claim is included for integrated electronic circuit.