Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor

The invention relates to a non volatile memory electronic device (20) integrated on semiconductor and of the Flash EEPROM type with NAND architecture comprising at least one memory matrix (21) divided into physical sectors, intended as smallest erasable units, and organised in rows or word lines (WL) and columns or bit lines (BL) of memory cells. At least one row (ROW_i) or word line of a given physical sector is electrically connected to at least one row or word line of an adjacent physical sector to form a single logic sector being completely erasable, with the source terminals of the corresponding cells of the pair of connected rows referring to a same selection line (SSL) of source line.