Address snoop method and multi-processor system

Address snoop methods and multi-processor systems to enable easy implementation of a large number of I/O blocks (14) in the multi-processor system (1), independently of processor blocks (11), and to prevent the upper limit of the performance of the multi-processor system (1) from deteriorating (prev...

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Bibliographische Detailangaben
Hauptverfasser: Odahara, Kouichi, Hosoe, Koji
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:Address snoop methods and multi-processor systems to enable easy implementation of a large number of I/O blocks (14) in the multi-processor system (1), independently of processor blocks (11), and to prevent the upper limit of the performance of the multi-processor system (1) from deteriorating (prevent latency from increasing). An address snoop method for a multi-processor system (1) having a structure in which a plurality of processor blocks (11) each having a plurality of processors (110) and a plurality of memories (111) are coupled to a plurality of input and output (I/O) blocks (14) via an address connecting apparatus (13), is configured to carry out an address snoop process that judges whether to respond with respect to an access request, in the address connecting apparatus (13) in place of each I/O block (14), when the access request is generated from an arbitrary one of the processor blocks (11).