A MULTI-RATE, MULTI-PORT, GIGABIT SERDES TRANSCEIVER
According to an aspect, a transceiver is provided, comprising: multiple parallel ports; multiple serial ports; and a bus connecting said multiple parallel ports and said multiple serial ports on a common substrate with said multiple parallel ports and said multiple serial ports, the transceiver furt...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | According to an aspect, a transceiver is provided, comprising:
multiple parallel ports;
multiple serial ports; and
a bus connecting said multiple parallel ports and said multiple serial ports on a common substrate with said multiple parallel ports and said multiple serial ports,
the transceiver further comprising a packet bit error rate tester (BERT) connected to said bus, said packet BERT able to determine bit error rates of at least one of said multiple parallel ports and said multiple serial ports. |
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