METHOD AND DEVICE FOR VERIFYING DIGITAL CIRCUITS

Method for verifying digital circuits, whereby a digital circuit (6) that is to be verified is compared with a reference description (5) so that by use of equivalence testing errors can be detected in the digital circuit. Accordingly, from a number of different possible circuit implementations (7),...

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Bibliographische Detailangaben
Hauptverfasser: MUELLER-BRAHMS, MARTIN, HOERETH, STEFAN, RUDLOF, THOMAS
Format: Patent
Sprache:eng ; fre ; ger
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