METHOD AND DEVICE FOR VERIFYING DIGITAL CIRCUITS
Method for verifying digital circuits, whereby a digital circuit (6) that is to be verified is compared with a reference description (5) so that by use of equivalence testing errors can be detected in the digital circuit. Accordingly, from a number of different possible circuit implementations (7),...
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| Format: | Patent |
| Sprache: | eng ; fre ; ger |
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| Zusammenfassung: | Method for verifying digital circuits, whereby a digital circuit (6) that is to be verified is compared with a reference description (5) so that by use of equivalence testing errors can be detected in the digital circuit. Accordingly, from a number of different possible circuit implementations (7), the one that most closely matches with the circuit to be verified is selected and used to replace the reference circuit. Lastly equivalence testing takes place between the selected circuit and the digital circuit to be verified. Independent claims are included for; (1) a device for verification of digital circuits; (2) computer program; and (3) implementation of the method. |
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