Flip chip heat sink package and method

An electronic package (10) having enhanced heat dissipation is provided exhibiting dual conductive heat paths (40, 42) in opposing directions. The package (10) includes a substrate (16) having electrical conductors thereon and a flip chip (12) mounted to the substrate (16). The flip chip (12) has a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Zimmerman, David W, Mandel, Larry M, Sarma, Dwadasi H, Gertiser, Kevin M, Chengalva, Suresh K
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Zimmerman, David W
Mandel, Larry M
Sarma, Dwadasi H
Gertiser, Kevin M
Chengalva, Suresh K
description An electronic package (10) having enhanced heat dissipation is provided exhibiting dual conductive heat paths (40, 42) in opposing directions. The package (10) includes a substrate (16) having electrical conductors thereon and a flip chip (12) mounted to the substrate (16). The flip chip (12) has a first surface, solder bumps (14) on the first surface, and a second surface oppositely disposed from the first surface. The flip chip (12) is mounted to the substrate (16) such that the solder bumps (14) are registered with the conductors on the substrate (16). The package (10) further includes a stamped metal heat sink (30) in heat transfer relationship with the second surface of the flip chip (12). The heat sink (30) includes a cavity (32) formed adjacent to the flip chip (12) containing a thermally conductive material (34).
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP1523040B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP1523040B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP1523040B13</originalsourceid><addsrcrecordid>eNrjZFBzy8ksUEjOABIZqYklCsWZedkKBYnJ2YnpqQqJeSkKuaklGfkpPAysaYk5xam8UJqbQcHNNcTZQze1ID8-tRioITUvtSTeNcDQ1MjYwMTAydCYCCUA1HsmWw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Flip chip heat sink package and method</title><source>esp@cenet</source><creator>Zimmerman, David W ; Mandel, Larry M ; Sarma, Dwadasi H ; Gertiser, Kevin M ; Chengalva, Suresh K</creator><creatorcontrib>Zimmerman, David W ; Mandel, Larry M ; Sarma, Dwadasi H ; Gertiser, Kevin M ; Chengalva, Suresh K</creatorcontrib><description>An electronic package (10) having enhanced heat dissipation is provided exhibiting dual conductive heat paths (40, 42) in opposing directions. The package (10) includes a substrate (16) having electrical conductors thereon and a flip chip (12) mounted to the substrate (16). The flip chip (12) has a first surface, solder bumps (14) on the first surface, and a second surface oppositely disposed from the first surface. The flip chip (12) is mounted to the substrate (16) such that the solder bumps (14) are registered with the conductors on the substrate (16). The package (10) further includes a stamped metal heat sink (30) in heat transfer relationship with the second surface of the flip chip (12). The heat sink (30) includes a cavity (32) formed adjacent to the flip chip (12) containing a thermally conductive material (34).</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180829&amp;DB=EPODOC&amp;CC=EP&amp;NR=1523040B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180829&amp;DB=EPODOC&amp;CC=EP&amp;NR=1523040B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Zimmerman, David W</creatorcontrib><creatorcontrib>Mandel, Larry M</creatorcontrib><creatorcontrib>Sarma, Dwadasi H</creatorcontrib><creatorcontrib>Gertiser, Kevin M</creatorcontrib><creatorcontrib>Chengalva, Suresh K</creatorcontrib><title>Flip chip heat sink package and method</title><description>An electronic package (10) having enhanced heat dissipation is provided exhibiting dual conductive heat paths (40, 42) in opposing directions. The package (10) includes a substrate (16) having electrical conductors thereon and a flip chip (12) mounted to the substrate (16). The flip chip (12) has a first surface, solder bumps (14) on the first surface, and a second surface oppositely disposed from the first surface. The flip chip (12) is mounted to the substrate (16) such that the solder bumps (14) are registered with the conductors on the substrate (16). The package (10) further includes a stamped metal heat sink (30) in heat transfer relationship with the second surface of the flip chip (12). The heat sink (30) includes a cavity (32) formed adjacent to the flip chip (12) containing a thermally conductive material (34).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBzy8ksUEjOABIZqYklCsWZedkKBYnJ2YnpqQqJeSkKuaklGfkpPAysaYk5xam8UJqbQcHNNcTZQze1ID8-tRioITUvtSTeNcDQ1MjYwMTAydCYCCUA1HsmWw</recordid><startdate>20180829</startdate><enddate>20180829</enddate><creator>Zimmerman, David W</creator><creator>Mandel, Larry M</creator><creator>Sarma, Dwadasi H</creator><creator>Gertiser, Kevin M</creator><creator>Chengalva, Suresh K</creator><scope>EVB</scope></search><sort><creationdate>20180829</creationdate><title>Flip chip heat sink package and method</title><author>Zimmerman, David W ; Mandel, Larry M ; Sarma, Dwadasi H ; Gertiser, Kevin M ; Chengalva, Suresh K</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP1523040B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Zimmerman, David W</creatorcontrib><creatorcontrib>Mandel, Larry M</creatorcontrib><creatorcontrib>Sarma, Dwadasi H</creatorcontrib><creatorcontrib>Gertiser, Kevin M</creatorcontrib><creatorcontrib>Chengalva, Suresh K</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zimmerman, David W</au><au>Mandel, Larry M</au><au>Sarma, Dwadasi H</au><au>Gertiser, Kevin M</au><au>Chengalva, Suresh K</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Flip chip heat sink package and method</title><date>2018-08-29</date><risdate>2018</risdate><abstract>An electronic package (10) having enhanced heat dissipation is provided exhibiting dual conductive heat paths (40, 42) in opposing directions. The package (10) includes a substrate (16) having electrical conductors thereon and a flip chip (12) mounted to the substrate (16). The flip chip (12) has a first surface, solder bumps (14) on the first surface, and a second surface oppositely disposed from the first surface. The flip chip (12) is mounted to the substrate (16) such that the solder bumps (14) are registered with the conductors on the substrate (16). The package (10) further includes a stamped metal heat sink (30) in heat transfer relationship with the second surface of the flip chip (12). The heat sink (30) includes a cavity (32) formed adjacent to the flip chip (12) containing a thermally conductive material (34).</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP1523040B1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Flip chip heat sink package and method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T16%3A46%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Zimmerman,%20David%20W&rft.date=2018-08-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP1523040B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true