Address distribution among independent cache memories

A system (10) for transferring data to and from one or more slow-access-time-mass-storage nodes (12) which store data at respective first ranges of logical block addresses (LBAs), including a plurality of interim-fast-access-time nodes (20) which are configured to operate independently of one anothe...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	REVAH, YARON, COHENOR, HELMAN, HAIM, ZOHAR, OFIR
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!