Integrated circuits having adjacent regions having shallow trench isolation structures without liner layers therein therebetween and methods of forming same

Integrated circuits having adjacent regions having shallow trench isolation structures without liner layers therein therebetween and methods of forming same

An integrated circuit substrate includes first and second adjacent p-type doped regions spaced-apart from one another. A trench in the integrated circuit substrate is between the first and second adj acent p-type doped regions. An insulator layer in the trench has a side wall, wherein the side wall...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: OH, YONGUL, JIN, GYO-YOUNG
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:An integrated circuit substrate includes first and second adjacent p-type doped regions spaced-apart from one another. A trench in the integrated circuit substrate is between the first and second adj acent p-type doped regions. An insulator layer in the trench has a side wall, wherein the side wall is free of a layer that reduces a stress between the integrated circuit substrate and the insulator layer.