Method of forming an integrated circuit thin film resistor

A thin film resistor structure (75) is formed on a dielectric layer (60). A capping layer (90) is formed above said thin film resistor structure (75) and vias (110) are formed in the capping layer (90) using a two step etching process comprising of a dry etch process and a wet etch process. Conducti...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Nguyen, Robert Hung, Kwok, Siang Ping, Beach, Eric W, Mahalingam, Mr.Pushpa, Steinmann, Philipp
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A thin film resistor structure (75) is formed on a dielectric layer (60). A capping layer (90) is formed above said thin film resistor structure (75) and vias (110) are formed in the capping layer (90) using a two step etching process comprising of a dry etch process and a wet etch process. Conductive layers (120) are formed in the vias and form electrical contacts to the thin film resistor structure (75).