Built-in testing methodology in flash memory

An effective EWS flow is implemented by expanding the functions of the microcontroller normally embedded in a FLASH EPROM memory device and of the integrated test structures. The architecture gives the possibility of executing test routines internally without involving any external complex or expensive test equipment to control the test program. The algorithms are executed by the onboard micro-controllers (that may be reading either from an embedded ROM or from a GLOBAL CACHE purposely provided). Such a GLOBAL CACHE may be downloaded with the desired routine to a TUI block and provides a full test flexibility also at the device debug level. Managing test routines by an internal algorithm permits to make the device architecture transparent from a tester point of view, by purposely creating a standard interface with a set of defined commands and instructions to be interpreted by the on board micro and internally executed.