Stabilisation method of the drain voltage in non-volatile multilevel memory cells and relating memory device
The present invention relates to a method and an electronic device for stabilising the voltage on the drain terminals of multilevel non volatile memory cells (3) in the programming step. In the method the application of said voltage is provided through a drain voltage regulator (2) having an output...
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| Format: | Patent |
| Sprache: | eng ; fre ; ger |
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| Zusammenfassung: | The present invention relates to a method and an electronic device for stabilising the voltage on the drain terminals of multilevel non volatile memory cells (3) in the programming step. In the method the application of said voltage is provided through a drain voltage regulator (2) having an output (OUT) connected to said terminals in a common circuit node (A) by means of a metal line (4) conduction path having a parasitic intrinsic resistance (Rpars). Advantageously, a feedback path (5) is provided between the node (A) and an input of the regulator (2). |
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