A method of forming a CMOS device

Fabricating complimentary metal oxide semiconductor device on substrate by forming gate structures on gate insulator layer, forming insulator structure with thick insulator component on gate structures and portion of substrate, performing two series of ion implantation procedures in device regions, forming insulator shapes on insulator structure in first device region, and forming metal silicide on gate structure and source/drain region. Fabricating complimentary metal oxide semiconductor device on a semiconductor substrate (1) comprises providing first and second device regions (30, 40) of the semiconductor substrate, forming gate structures on an underlying gate insulator layer in the first and second device regions, forming insulator structure containing thick insulator component on the sides of the gate structures and first portion of the semiconductor substrate adjacent tot he gate structure, performing first and second series of ion implantation procedures in the first and second device region, respectively, forming insulator shapes on the insulator structure in the first device region to obtain a composite insulator spacer on gate structure exposing top surface of the gate structure and of the second heavily doped source/drain region, and forming metal silicide on exposed top surface of the gate structure and of the first heavily doped source/drain region. The series of ion implantation procedure is performed to form a halo region of a conductivity type in the first and second portions of the semiconductor substrate and in portion of the semiconductor substrate underlying an edge of the gate structure and to form a first lightly doped source/drain region of a conductivity type in a top portion of the halo region underlying the thin insulator component overlying second portion of semiconductor substrate. A method of fabricating a CMOS device with reduced processing costs as a result of a reduction in photolithographic masking procedures, has been developed. The method features formation of L shaped silicon oxide spacers on the sides of gate structures, with a vertical spacer component located on the sides of the gate structure, and with horizontal spacer components located on the surface of the semiconductor substrate with a thick horizontal spacer component located adjacent to the gate structures, while a thinner horizontal spacer component is located adjacent to the thicker horizontal spacer component. After formation of a block out shape in a PMOS