Amplifier circuit and multistage amplifier circuit

An amplifier circuit includes a first FET (95) of an enhancement type having a gate supplied with an input signal (IN) and a gate bias voltage (VGBS), and a drain via which an amplified output signal (OUT) is output, a current path directed to a source from the gate being formed; a second FET (100) of the enhancement type having a drain connected to a gate bias supply source for the first FET, a gate supplied with a control signal (Vcontro14), and a source via which a source voltage controlled by the control signal is output, the source voltage being supplied to the gate of the first FET (95) as the gate bias voltage; and a resistance element (102) having a first end connected to the source of the second FET (100) and the gate of the first FET (95), and a second end grounded.