HIGH SPEED NETWORK PROCESSOR

HIGH SPEED NETWORK PROCESSOR

A Network Processor (NP) is formed from a plurality of operatively coupled chips. The NP includes a Network Processor Complex (NPC) Chip coupled to a Data Flow Chip and Data Store Memory coupled to the Data Flow Chip. An optional Scheduler Chip is coupled to the Data Flow Chip. The named components...

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Bibliographische Detailangaben
Hauptverfasser: GOETZINGER, WILLIAM, JOHN, VERPLANKEN, FABRICE, HEDDES, MARCO, C, LOGAN, JOSEPH, FRANKLIN, NORGAARD, DAVID, ALAN, CALVIGNAC, JEAN, LOUIS, MIKOS, JAMES, FRANCIS, HANDLOGTEN, GLEN, HOWARD
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:A Network Processor (NP) is formed from a plurality of operatively coupled chips. The NP includes a Network Processor Complex (NPC) Chip coupled to a Data Flow Chip and Data Store Memory coupled to the Data Flow Chip. An optional Scheduler Chip is coupled to the Data Flow Chip. The named components are replicated to create a symmetric ingress and egress structure.