MICROELECTRONIC PACKAGE HAVING BUMPLESS LAMINATED INTERCONNECTION LAYER

MICROELECTRONIC PACKAGE HAVING BUMPLESS LAMINATED INTERCONNECTION LAYER

A microelectronic device fabrication technology that places at least one microelectronic die within at least one opening in a microelectronic package core and secures the microelectronic die/dice within the openings(s) with an encapsulation material, that encapsulates at least one microelectronic di...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: WERMER, Paul, H, TOWLE, Steven, N
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A microelectronic device fabrication technology that places at least one microelectronic die within at least one opening in a microelectronic package core and secures the microelectronic die/dice within the openings(s) with an encapsulation material, that encapsulates at least one microelectronic die within an encapsulation material without a microelectronic package core, or that secures at least one microelectronic die within at least one opening in a heat spreader. A laminated interconnector of dieelectric materials and conductive traces is then attached to the microelectronic die/dice and at least one of following: the encapsulation material, the microelectronic package core, and the heat spreader, to form a microelectronic device.