COMPUTER PERIPHERAL DEVICE THAT REMAINS OPERABLE WHEN CENTRAL PROCESSOR OPERATIONS ARE SUSPENDED

COMPUTER PERIPHERAL DEVICE THAT REMAINS OPERABLE WHEN CENTRAL PROCESSOR OPERATIONS ARE SUSPENDED

A peripheral device having a circuit to detect the power management state of a central processor, a first interface to receive data, and a second interface to couple the peripheral device to the central processor. The peripheral device prevents data transfers that would cause the central processor t...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CLINE, LESLIE, HART, FRANK, SRITANYARATAN, SIRPONG, BORMANN, DAVID
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A peripheral device having a circuit to detect the power management state of a central processor, a first interface to receive data, and a second interface to couple the peripheral device to the central processor. The peripheral device prevents data transfers that would cause the central processor to change from a second power management state to a first power management state if the central processor is in the second power management state.