Processor and method of pipelining

An electronic processing device has an integer pipeline (2) and a load/store pipeline (3) arranged in parallel to receive a series of instructions via a Fetch stage (4) and a Predecode stage (5). If an instruction (c) is stalled in a Decode stage (6) of the integer pipeline (2), one or more Delay st...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	HASTIE, NEIL STUART, FARRALL, GLENN ASHLEY, NORDEN, ERIK KARL
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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