Receiver/decoder and module for use with a receiver/decoder

A receiver/decoder (2000) is disclosed comprising a host processor (2002), a co-processor (2004) and a communication channel (2006) for communication between the host processor and the co-processor. By providing two separate processors within the receiver/decoder, greater processing power and flexibility is provided. Preferably, the receiver/decoder further comprises a device, and the co-processor is adapted to run a low-level software process which manages the device. Preferably, the host processor is adapted to run a high-level application adapted to generate a control message, and the communication channel is adapted to transmit the control message from the host processor to the co-processor. By separating the internal functions of the receiver/decoder into high level applications and low level device management and providing the functionality on separate processors, greater independence from the low level aspects of the receiver/decoder can be provided to the applications.