Device and method for testing phase-locked loops

A phase-locked loop (PLL) (45) is tested based on a divide-and-conquer strategy. First, digital components (11, 12, 15 and 16) in the PLL are isolated from analog components (13 and 14) and tested. Next, the digital components are connected to the analog components and the PLL is exercised by causin...

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Bibliographische Detailangaben
1. Verfasser:	BOATENG, KWAME OSEI
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
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Beschreibung
Zusammenfassung:	A phase-locked loop (PLL) (45) is tested based on a divide-and-conquer strategy. First, digital components (11, 12, 15 and 16) in the PLL are isolated from analog components (13 and 14) and tested. Next, the digital components are connected to the analog components and the PLL is exercised by causing it to undergo a series of frequency transitions.