COMPILER-ORIENTED APPARATUS FOR PARALLEL COMPILATION, SIMULATION AND EXECUTION OF COMPUTER PROGRAMS AND HARDWARE MODELS

COMPILER-ORIENTED APPARATUS FOR PARALLEL COMPILATION, SIMULATION AND EXECUTION OF COMPUTER PROGRAMS AND HARDWARE MODELS

An apparatus is disclosed for integrating a general purpose processor with one or more electronically reconfigurable logic arrays so that a subset of the general purpose processor instruction set encodings (opcodes) may control functionality implemented by a reconfigurable logic block analogous to o...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: WILLIS, JOHN, C, NEWSHUTZ, ROBERT, N
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:An apparatus is disclosed for integrating a general purpose processor with one or more electronically reconfigurable logic arrays so that a subset of the general purpose processor instruction set encodings (opcodes) may control functionality implemented by a reconfigurable logic block analogous to operations implemented by fixed functionality execution units conventionally incorporated within a processor.