Method for planarising the device topography on solid state imagers

An improved and simplified process for reducing the topography within a solid state imager by using a single coat, expose, and development sequence to produce a transparent layer that fills in the topographic features surrounding the photoactive area while also planarizing the photoactive area. The...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MURPHY, CYNTHIA M, PACE, LAUREL J, EWBANK, DALE E, ERHARDT, HERBERT J, HANRAHAN, MICHAEL J
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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