Processor having internal control instructions

The present invention relates to a processor provided with a set of instructions formed, in general, of an operation section (S1) and an operand section (S2); for at least one (CNTR) of the instructions, the operand section (S2) represents operation control signals (CO) of the processor. In this way...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TESI, DAVIDE, BOMBACI, FRANCESCO, MAMMOLITI, FRANCESCO NINO, PAPPALARDO, FRANCESCO
Format: Patent
Sprache:eng ; fre ; ger
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