Dram cell capacitor and method for manufacturing the same

A DRAM cell capacitor is provided wherein a capacitor bottom electrode (110a) has an HSG (Hemi-Spherical Grain) layer (115) formed thereon so as to increase capacitance of the capacitor. In the DRAM cell capacitor, the capacitor bottom electrode (110a) has an angled shape at a top edge thereof, and the HSG silicon layer (115) is not formed on the top edge of the capacitor bottom electrode (110a). A method for manufacturing the DRAM cell capacitor comprises etching an upper portion of a conductive layer (110) using a photoresist pattern (112) as a mask, and at the same time forming a polymer (113) on both sidewalls of the photoresist pattern (112) to etch the upper portion thereof and thereby to make a top edge of the conductive layer (110) angled. The method further comprises etching a remaining portion of the conductive layer (110) using a combination of the photoresist pattern (112) and the polymer (113) as a mask until an upper surface of the interlayer insulating layer (106) is exposed, to thereby formed the capacitor bottom electrode.