System and method for mapping processor clock values in a multiprocessor system

A system and method is disclosed for accurately and efficiently synchronizing and then mapping, or normalizing, processor clocks in a multiprocessor information handling system. The system and method of the present invention provide sufficient granularity for subcycle variations between processors, while taking into account the problem of clock drifts. A plurality of processors are selected for the purpose of synchronization. The clocks located on the processors are synchronized, and then time values between synchronization points are mapped from each secondary processor to an equivalent, or normalized, time value in a primary processor. To accomplish this mapping, three clock differences are calculated. The first clock difference is the time between the first and second synchronization points for the primary processor, and the second clock difference is the time between the first and second synchronization points for the secondary processor. The third clock difference is the time difference between the time value to be mapped in the secondary processor and the first synchronization point in the secondary processor. The third time difference is multiplied by the ratio of the first time difference to the second time difference, and then the result is added to the time value of the primary clock at the first synchronization point. The final result is the mapped, or normalized, time value.