NMOS negative charge pump

A negative charge pump circuit comprises a plurality of charge pump stages (S1'-S4') connected in series to each other. Each stage has a stage input terminal (SI) and a stage output terminal (SO). A first stage (S1') has the stage input terminal (SI) connected to a reference voltage, a final stage (S4') has the stage output terminal (SO) operatively connected to an output terminal (O) of the charge pump at which a negative voltage is developed; intermediate stages (S2' ,S3') have the respective stage input terminal (SI) connected to the stage output terminal (SO) of a preceding stage and the respective stage output terminal connected to the stage input terminal of a following stage. Each stage (S1'-S4') comprises a first N-channel MOSFET (M1') with a first electrode connected to the stage input terminal (SI) and a second electrode connected to the stage output terminal (SO), a second N-channel MOSFET (M2') with a first electrode connected to the stage output terminal (SO) and a second electrode connected to a gate electrode of the first N-channel MOSFET (M1'), a boost capacitor (CP) with one terminal connected to the gate electrode of the first N-channel MOSFET and a second terminal driven by a respective first digital signal (A',C') switching between the reference voltage and a positive voltage supply (VDD), and a second capacitor (CL) with one terminal connected to the charge pump stage output terminal (SO) and a second terminal connected to a respective second digital signal (B',D') switching between the reference voltage and the voltage supply (VDD). A gate electrode of the second N-channel MOSFET (M2') is connected, in the first stage (S1'), to a third digital signal (D') switching between the reference voltage and the voltage supply, while in the remaining stage the gate electrode of the second N-channel MOSFET is connected to the stage input terminal (SI).