DATA READING METHOD FOR FERROELECTRIC MEMORY, AND FERROELECTRIC MEMORY

It is an object to present a reading method of a ferroelectric memory device capable of operating at low voltage more securely than in the prior art, and a ferroelectric memory device. To achieve the object, for example, as shown in FIG. 1, after applying a pulse form cell plate signal CP to cell plate electrodes, potentials of bit lines BL0 and /BL0 are respectively set to logic voltage H and L by a sense amplifier. That is, for the cell plate electrode, an electric field is once applied to the ferroelectric capacitor, and the signal application is controlled so as not to apply electric field afterwards, and the potentials of the bit lines are amplified by the sense amplifier.