Method of making semiconductor devices by patterning a wafer having a non-planar surface

In accordance with a specific deposition/etching sequence, a multi-layer metallization system is formed on the non-planar top surface of a semiconductor wafer. In an electrophoretic deposition step, a conformal uniform-thickness layer of a resist material is then formed on the top surface of the metallization system. In turn, the layer of resist material is lithographically patterned to provide an etch-mask for defining features in the underlying metallization system.