CMOS semiconductor device

An improved layout of transistors near LCD drive terminals in a CMOS semiconductor device to reduce a chip size without damaging resistances against electrostatic destruction and latch-up. MOSFETs whose sources are connected to neither an electric source nor a ground are selectively arranged between...

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1. Verfasser: TSUBOI, TOSHIHIDE
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:An improved layout of transistors near LCD drive terminals in a CMOS semiconductor device to reduce a chip size without damaging resistances against electrostatic destruction and latch-up. MOSFETs whose sources are connected to neither an electric source nor a ground are selectively arranged between two protective diffusion layers having different polarities, connected to a terminal.