Process for the manufacturing of integrated circuits comprising lateral low-voltage and high-voltage DMOS-technology power devices and non-volatile memory cells

A process for the manufacturing of an integrated circuit comprising lateral DMOS-technology power devices and non-volatile memory cells provides for: forming respective laterally displaced isolated semiconductor regions (R1,R2,R6), electrically insulated from each other and from a common semiconduct...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	GALBIATI, PAOLA, CONTIERO, CLAUDIO, PALMIERI, MICHELE
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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