$Refractory gate heterostructure field effect transistor and method$

Refractory gate heterostructure field effect transistor and method

A heterostructure field effect transistor and method including at least one passivation layer (20) and at least one etch stop layer (22). Enhancement, depletion and combined devices with both enhancement mode and depletion mode devices are possible with minor process variations. Refractory gate (40)...

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Bibliographische Detailangaben
Hauptverfasser:	NAIR, VIJAY K, NIKPOURIAN, FARIDEH, ABROKWAH, JONATHAN K, HASHEMI, MAJID M, TEHRANI, SAIED NIKOO, O'NEIL, VERNON PATRICK II, HUANG, JENN-HWA
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:	A heterostructure field effect transistor and method including at least one passivation layer (20) and at least one etch stop layer (22). Enhancement, depletion and combined devices with both enhancement mode and depletion mode devices are possible with minor process variations. Refractory gate (40) and non-gold refractory ohmic contact (52) metallization combined with other features allows non-liftoff metal patterning.