Prevention of jitter on the output image of a video camera

This is a divisional application out of EP-A-0 483 745 related to a video camera with digitized image processing. Digital color signal processing is performed on the basis of two timing clocks with a first clock fs which is in synchronism with the scanning cycle of the image signal and a second clock nfsc with a frequency n-times (e.g., n = 4) the frequency of a color subcarrier fsc depending on the color TV system used. The image is picked up by the solid-state CCD sensor (1) of the video camera. The sensor adopts several values as the number of horizontal pixels. Since the horizontal scanning period is fixed, different sensor clock frequencies of the horizontal pixel read clock must be provided for each different scanning system. This video camera comprises programmable synchronization signal clock generating means (timing generator TG 52, sync signal generating circuit SSG 66) which is controlled by a microcomputer 7 to make the timing of the sync signal variable thereby enabling the application of sensors having different specifications. In the processing of the digital signals the sensor clock fs is used as the clock to generate the luminance and color difference signals 14, 15. Also, an fs unit in the SSG generates the sync signals for the TV. In this way, the luminance signal is synchronous with the sync signals. Thus, when the digital signal processor 3 supplements the luminance signal with the sync signals, only a short timing difference occurs which prevents jitter.