A data processor with breakpoint circuit and method therefor

Existing chip select comparator logic (42) is used to compare a portion of the address value with a range of chip select addresses to provide match signals for use by both the chip select logic (70) and a breakpoint logic circuit (50.x). The match signal is used by the chip select logic circuit (70) and is reused by the breakpoint logic circuit to perform a different and distinct function. By using the match signal and a breakpoint enable bit, the breakpoint logic circuit selectively asserts a breakpoint signal. Subsequently, a central processing unit (12) receives the breakpoint signal and initiates a breakpoint exception operation to determine whether the breakpoint condition is met and whether further action should be taken.