Inverting delay circuit

An inverting delay circuit comprising: a differential amplifier (OTA) having a non-inverting input (+) coupled to ground, an inverting input (-) and an output; an input capacitor (Cin) which is coupled between an input of the inverting delay circuit and the inverting input (-) during a first switching phase ( phi ), and which is discharged during another switching phase ( phi ); a feedback capacitor (Cx) which is coupled between the output and the inverting input (-) of the differential amplifier (OTA) during the first switching phase ( phi ), and between the inverting input (-) and ground during a second switching phase ( phi ); and an output capacitor (Co) which is coupled between the output and the inverting input (-) during the second switching phase ( phi ), the output capacitor (Co) being discharged during the first switching phase ( phi ), a charge on the feedback capacitor (Cx) being transferred to the output capacitor (Co) during the second switching phase ( phi ).