Advanced parallel array processor mechanical packaging

A parallel array processor is formed. Eight processors on a single chip have their own associated processing element, memory, and I/O and are interconnected with a hypercube based topology. These nodes are then interconnected, either by a hypercube, modified hypercube, or ring, or ring within ring network topology. The new architecture merges processor and memory with multiple PMEs in DRAM and has no memory access delays and uses all the pins for networking. The chip can be a single node of a fine-grained parallel processor.