Variable delay circuit

Variable delay circuit

The delay circuit includes a fixed-delay circuit (D1) supplying a signal (e1) with is delayed with respect to the input signal (e0). It comprises a combinatorial circuit (C) which supplies a combinatorial signal (fK) resulting from the weighted superposition with integral effect of the input (e0) an...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: COMBES, MICHEL, COFLER, ANDREW, LEBIHAN, JEAN-CLAUDE, NEZAMZADEH-MOOSAVI, REZA, MARBOT, ROLAND
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:The delay circuit includes a fixed-delay circuit (D1) supplying a signal (e1) with is delayed with respect to the input signal (e0). It comprises a combinatorial circuit (C) which supplies a combinatorial signal (fK) resulting from the weighted superposition with integral effect of the input (e0) and delayed (e1) signals. The whole unit is designed such that the fixed delay (T) is less than the transition time exhibited by the combinatorial signal (fK) when only the input signal (e0) is applied. Devices produced in ECL and CMOS technologies. Application in particular to phase-locked circuits.