Interconnect and resistor for integrated circuits

A method is provided for forming a polycrystalline silicon resistive load element of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A lightly doped conductive layer (24) having a conductivity of a first type. A oxide layer (26) is formed over the integrat...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	CHEN, FUSEN E, MILLER, ROBERT O, DIXIT, GIRISH ANANT
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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