EP0536414

An apparatus for processing images, in which addresses sent from a CPU (50) are decoded by a circuit (103) for decoding addresses, and the entry region storing the image memories corresponding to the sent addresses is sensed from among plural entry regions divided in two-dimensional directions of a...

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Bibliographische Detailangaben
Hauptverfasser: MAKI, KAZUHIKO, OKI ELECTRIC INDUSTRY CO., LTD, KOMOTO, EIJI, OKI ELECTRIC INDUSTRY CO., LTD
Format: Patent
Sprache:eng
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Zusammenfassung:An apparatus for processing images, in which addresses sent from a CPU (50) are decoded by a circuit (103) for decoding addresses, and the entry region storing the image memories corresponding to the sent addresses is sensed from among plural entry regions divided in two-dimensional directions of a cache memory (102). Thereby, the accesses for necessary image data can be performed efficiently.