EP0519854

A method of controlling the interfacial oxygen concentration of a monocrystalline/polycrystalline emitter includes the steps of: passivating the monocrystalline silicon surface by immersing the wafer in a diluted HF acid solution; transferring the wafer into a high vacuum environment; heating the wa...

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Bibliographische Detailangaben
Hauptverfasser: KULKARNI, SUBODH KESHAV, LANGE, RUSSEL CHARLES, KNEPPER, RONALD WILLIAM, COOK, ROBERT KIMBAL, SUBBANNA, SESHADRI, YUN, BOB HONG, TEJWANI, MANU JAMNADAS, RONSHEIM, PAUL ANDREW
Format: Patent
Sprache:eng
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Zusammenfassung:A method of controlling the interfacial oxygen concentration of a monocrystalline/polycrystalline emitter includes the steps of: passivating the monocrystalline silicon surface by immersing the wafer in a diluted HF acid solution; transferring the wafer into a high vacuum environment; heating the wafer to between 400 and 700 _C; exposing the monocrystalline silicon surface to a gas having a partial pressure of oxygen of between 10 to 1 Torr for between 1 and 100 minutes; and, depositing polysilicon onto the monocrystalline silicon surface. In a typical exemple of manufacturing a NPN bipolar transistor (70) comprises a P- doped substrate (80); a N+ doped monocrystalline subcollector (90); a N doped monocrystalline silicon collector (100); a P doped base (102); a P+ doped polysilicon contact layer (106); and, insulating layers (108, 110). A hole (114) is then etched through the insulating layers (108, 110) and the contact layer (106). A partial reoxidation of contact layer (106) is then done to form an insulation layer (109) between the P+ polysilicon of contact layer (106) and hole (114). The surface of P doped base (102) which is exposed at the bottom of the hole (114) is then oxidized according to the methods of the present invention to thereby form an interface layer (116) of silicon having a specific concentration of oxygen. A layer of polycrystalline silicon (112) is then deposited in the hole (114), implanted with N dopant (e.g. Arsenic) and annealed to thereby form the emitter, which is comprised of n+ area (104), SiOx interface (116) and polysilicon (112).