CIRCUIT FOR EXTRACTING ASYNCHRONOUS SIGNAL

A circuit for extracting asynchronous signals which extracts the asynchronous signals multiplexed in a synchronous frame comprises a separating part (1) for separating a clock signal synchronized with an effective data in the asynchronous signals from them, a buffer memory (2) in which the effective...

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Bibliographische Detailangaben
Hauptverfasser: YAMASHITA, HARUO, 103, DAIICHI IIZUKA KOPPO, TAKIZAWA, YUJI, FUJITSU NAKAHARA HAUSE W-10 401
Format: Patent
Sprache:eng
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Zusammenfassung:A circuit for extracting asynchronous signals which extracts the asynchronous signals multiplexed in a synchronous frame comprises a separating part (1) for separating a clock signal synchronized with an effective data in the asynchronous signals from them, a buffer memory (2) in which the effective data in the separated asynchronous signals is written by using the clock signal as a write clock signal, a phase synchronizing circuit (3) for generating a readout clock signal for the memory (2), and a controlling part (5) which controls the changeover of the band of a low-pass filter (4) in the circuit (3) periodically or according to the detecting signal for pointer-adjustment. Low-frequency jitters included in the readout clock signal is suppressed.