CMOS process utilizing disposable silicon nitride spacers for making lightly doped drain transistors

CMOS process utilizing disposable silicon nitride spacers for making lightly doped drain transistors

A process sequence for fabricating CMOS devices of the LDD type includes forming spacers (36,37) along the sides of gates defined on p- and n-regions (10,12) of the device. In a two-mask sequence, a thin layer of silicon dioxide (52) is utilized to protect the n-region spacers (36,37) while the p-re...

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Bibliographische Detailangaben
1. Verfasser: CHEN, TEH-YI JAMES
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Zusammenfassung:A process sequence for fabricating CMOS devices of the LDD type includes forming spacers (36,37) along the sides of gates defined on p- and n-regions (10,12) of the device. In a two-mask sequence, a thin layer of silicon dioxide (52) is utilized to protect the n-region spacers (36,37) while the p-region spacers are etched away. In one-mask variants of this sequence, a thin layer of silicon oxynitride (68) is utilized to prevent oxide growth over one type of region (10) while an oxide implant mask is grown on the surface of the other type of region (12) and on exposed surfaces of the gates overlying the other type of region.