Dry interface thermal chuck temperature control system for semiconductor wafer testing

A wafer chuck temperature control system is disclosed for use in a semiconductor wafer testing apparatus. The wafer chuck is divided into a plurality of temperature sensor and cooling element domains corresponding to chip location regions of an overlying undiced wafer being tested. Computer scanning...

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Bibliographische Detailangaben
Hauptverfasser:	ROGGEMANN, PAUL JOSEPH, GASCHKE, PAUL MATTHEW, LONGENBACH, KORT FOSTER, BULLARD, STUART HOWARD, LAFORCE, MARK RAYMOND, DEL PUERTO, SANTIAGO ERNESTO, ABRAMI, ANTHONY JOHN
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	APPARATUS SPECIALLY ADAPTED THEREFOR BASIC ELECTRIC ELEMENTS CINEMATOGRAPHY CONTROLLING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY ELECTROGRAPHY HOLOGRAPHY MATERIALS THEREFOR MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES ORIGINALS THEREFOR PHOTOGRAPHY PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES PHYSICS REGULATING SEMICONDUCTOR DEVICES SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES TESTING
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Beschreibung
Zusammenfassung:	A wafer chuck temperature control system is disclosed for use in a semiconductor wafer testing apparatus. The wafer chuck is divided into a plurality of temperature sensor and cooling element domains corresponding to chip location regions of an overlying undiced wafer being tested. Computer scanning of the sensors determines which domain is the one harboring the heat source (chip under test) and selects the same for connection to a closed loop temperature control feedback servo. Provision also is made for introducing a helium gas interface between the wafer and the chuck by placing annular grooves in the face of the chuck through which the helium flows when the wafer is vacuum-seated against the chuck. A predetermined helium gas flow rate is maintained to preserve vacuum holddown and to optimize the thermal resistance of the wafer-chuck interface.