Method and apparatus for reading and programming electrically programmable memory cells

Apparatus for decoding a plurality of electrically programmable memory cells (30-70) comprises an array source driver circuit (72) for selectively connecting a first terminal (140) of a selected memory cell (152) to a program bias voltage or to ground. A bit line driver circuit (94-100, 120) selectively connects a second terminal (154) of said selected memory cell (152) to ground or to a read sense node (115). Reading is performed by connecting the first terminal (140) to ground and the second terminal (154) to the read sense node (115). Programming is performed by connecting the first terminal (140) to the program bias voltage and the second terminal (154) to ground.