Novel BICMOS logic gate circuit and structures

Novel BICMOS logic gate circuit and structures

A BICMOS output buffer is taught including circuit means for firstly discharging (321,331) the bases of the bipolar pull up and bipolar pull down transistors, and secondly to connect (322,332) the base of an output transistor (307,309) to its emitter when that output transistor is conducting, thereb...

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Bibliographische Detailangaben
Hauptverfasser: CHAM, KIT MAN, GLEASON, ROBERT E
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
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Zusammenfassung:A BICMOS output buffer is taught including circuit means for firstly discharging (321,331) the bases of the bipolar pull up and bipolar pull down transistors, and secondly to connect (322,332) the base of an output transistor (307,309) to its emitter when that output transistor is conducting, thereby insuring maximum voltage swing of the output voltage. The circuit means comprises an MOS transistor (321,331) for discharging the base of an output transistor, and a depletion mode MOS transistor (322,332) for connecting the base of an output transistor (307,309) to its emitter. By utilizing MOS and depletion mode transistors, a significant area advantage is achieved, particularly when the MOS and depletion mode transistors are merged.