Chip identification method for use with scan design systems and scan testing techniques

Chip identification method for use with scan design systems and scan testing techniques

A method and apparatus are provided for uniquely identifying integrated circuit chips adapted for use with scan design systems and scan testing techniques. A predetermined identification number corresponding to each LSS chip to be identified is assigned. Each predetermined identification number has...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: GEER, CHARLES PORTER, MARQUART, DAVID WAYNE
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
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Beschreibung
Zusammenfassung:A method and apparatus are provided for uniquely identifying integrated circuit chips adapted for use with scan design systems and scan testing techniques. A predetermined identification number corresponding to each LSS chip to be identified is assigned. Each predetermined identification number has a predefined format. The assigned identification number is stored in a plurality of predefined shift register latches (SRLs) (14-18) in the corresponding LSI chip to be identified. Then the LSI chip is identified by selectively reading out the stored predetermined identification number.