Circuit arrangement for detecting the data quantity transmitted in an ATM-switching system and for checking compliance with specified bit rates

The circuit arrangement is used in the transmission of information cells via virtual links for connection-individual detection of the data quantity transmitted in an ATM switching system (BVA). In the ATM switching system, a number of counting devices (ZSP, Reg2, ADD) corresponding to the number of virtual links passing via the respective feeder line is assigned to each of the feeder lines (E1,... En) provided to receive information cells. These counting devices can be activated individually when information cells occur, according to the cell header contained in each case therein which designates the respective virtual link, for connection-individual detection of the information cells.