Data processing apparatus adapted to connect to high speed links

The disclosed arrangement provides apparatus and method for implementing a High Speed Link (HSL) such as the newly proposed ANSI High-Speed Channel (HSC) standard on processors complexes like the IBM 3090 having a paging store with an independent bus. A high speed link adapter (HSLA) including input...

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Bibliographische Detailangaben
Hauptverfasser:	WEHRLY, DAVID SILER, NORTON, DARWIN WILLIAM, JR, ZIMMERMAN, TERRENCE KEITH, SILSBEE, DAVID LLOYD, LEE, ARLIN EARL, SHALKEY, ERIC THOMAS, BRANDT, HENRY ROBERT, CAVAGNARO, HAROLD FRANCIS, BONO, RICHARD CHARLES, WILLIAMS, CLIFFORD TROY
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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Beschreibung
Zusammenfassung:	The disclosed arrangement provides apparatus and method for implementing a High Speed Link (HSL) such as the newly proposed ANSI High-Speed Channel (HSC) standard on processors complexes like the IBM 3090 having a paging store with an independent bus. A high speed link adapter (HSLA) including input and output buffers and controls is coupled to the independent bus under program control. Program access to high speed link is obtained by an extension to the Page-in and Page-out instructions.