DC/DC CONVERTER

A latch (29) is set by a clock (33) to turn on power switch (FET 5). The latch (29) is reset by high voltage comparator (21), by a 50 percent clock delay (35) and by a low-voltage-to-charging-current comparator (19). The voltage at turn-on is compared with a up-ramping reference (15) until it equals...

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Bibliographische Detailangaben
Hauptverfasser:	THOMAS, DAVID ROSS, NEWTON, STEPHEN FRANCIS, HURD, JONATHAN JAMES, GRAF, PAUL WILLIAM, JONES, CHRISTOPHER DANE, DEMOOR, MARK KEVIN, CASSANI, JOHN CENCI
Format:	Patent
Sprache:	eng
Schlagworte:	APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS CONTROL OR REGULATION THEREOF CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY GENERATION
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Beschreibung
Zusammenfassung:	A latch (29) is set by a clock (33) to turn on power switch (FET 5). The latch (29) is reset by high voltage comparator (21), by a 50 percent clock delay (35) and by a low-voltage-to-charging-current comparator (19). The voltage at turn-on is compared with a up-ramping reference (15) until it equals an operating reference (17). A temporary delay (pulse circuit 39 and gate 37) is provided before the low voltage comparison can be effective. The delay prevents response to parasitic effects across the power switch (5). Excess drive is prevented resulting from low output currents and malfunctions, and at turn-on.