Branch prediction

A branch prediction is made by searching a cache memory (79) for branch history information associated with a branch instruction. If associated information is not found in the cache, then the branch is predicted based on a predetermined branch bias for the branch instruction's opcode; otherwise, the branch is predicted based upon the associated information from the cache. The associated information in the cache preferably includes a length, displacement, and target address in addition to a prediction bit. If the cache includes associated information predicting that the branch will be taken, the target address from cache is used so long as the associated length and displacement match the length and displacement for the branch instruction; otherwise, the target address must be computed. Therefore, the cache need not be flushed during "context switches" when the computer program is changed. To predict multiple branches simultaneously for a pipelined machine in which instruction decoding, target address computation and branch decision or verification may occur in any order for a respective branch instruction, a sequential state machine (91) is provided having primary states which make predetermined transitions in response to the possible sequences of instruction decoding, target address computation, and branch decision or validation, and markers which store information about the branch predictions made or verified. To further reduce the length of stalls, a cycle in the normal instruction execution is bypassed by the execution unit when resolving the branch direction.